Cmod S7- Breadboardable Spartan-7 FPGA Module
The Cmod, or Carrier Module, family of products is designed to offer quick, simple, and flexible integration of an FPGA into circuit design, prototyping, and learning/hobby projects.
The Digilent Cmod S7 is a small, 48-pin DIP form factor board, populated with 36 pins, built around a Xilinx® Spartan®-7 FPGA that brings FPGA power and prototyping to a solderless breadboard.
The board includes a Quad-SPI flash for programming, as well as a USB-JTAG programming circuit and USB-UART bridge. The Cmod S7 also features a clock source, Pmod port, and onboard I/O with LEDs and pushbuttons. There are 32 FPGA I/O signals, 2 FPGA analog input signals, an external power input rail, and ground that are routed to 100-mil-spaced through-hole pins, making the Cmod S7 compatible with solderless breadboards. This form factor makes the Cmod S7 a great option for flexible and affordable prototyping, or learning FPGA and digital logic circuits. At just .7″ by 3.05″, it can also be loaded in a standard socket and used in embedded systems.
The Spartan-7 FPGA on the Cmod S7 fits performance into a small form-factor packaging. With the MicroBlaze Soft Processor Core from Xilinx, you can create embedded applications with a variety of peripherals, memory, and interfaces.
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Xilinx Spartan-7 FPGA (XC7S25-1CSGA225C)
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3,650 slices containing four 6-input LUTs and 8 flip-flops
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1,620 Kbits of fast block RAM
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Three clock management tile, each with a phase-locked loop and mixed-mode clock manager
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80 DSP slices
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Internal clock speeds exceeding 450 MHz
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On-chip analog-to-digital converter (XADC)
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Programmable over JTAG and Quad-SPI Flash
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Memory
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4 MB Quad-SPI Flash
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Power
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Powered from USB or 5V external supply connected to DIP pin 24 (micro USB cable NOT included)
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USB
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USB-JTAG programming circuitry
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USB-UART bridge
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Push-buttons and LEDs
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2 Buttons
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4 LEDs
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1 RGB LED
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Expansion Connectors
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1 Pmod connector
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8 total FPGA I/O
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48-pin DIP form-factor headers
- 36 populated pins
- 32 total FPGA I/O
- 2 Single-ended 0-3.3V analog inputs to XADC
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